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Archive for January 2007

Oldskool: tiled texture mapping

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While reading “Inside the Machine” (see my earlier post), I thought about the times (many many years ago!) when I was doing (demo)coding on my old 486 (then substituted by an AMD K5), using nice little tricks to optimize the execution of inner loops and writing assembly code day and night. In ’97 I wrote a little doc, which is still lying around in my hard drive (and somewhere non the net), on the subject of fast texture mapping by using cache-friendly tiling techniques. Just for fun I decided to restore this doc and put it in this blog. Keep in mind it’s almost 10 years old! :-)

Read on…

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Written by theglide

January 8, 2007 at 8:38 pm

Posted in Code

Book: Inside the Machine

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insidethemachine.png Happy 2007!

The first post of 2007 is dedicated to the review of a book that I’ve read during the Christmas period: “Inside the Machine”, by Jon “Hannibal” Stokes, Senior CPU Editor of Ars Technica. The book subtitle says “An Illustrated Introduction to Microprocessors and Computer Architecture” and I think that it pretty much keeps its promise.

The book contains a detailed review of all the major microprocessor architectures that have seen the light since the early ’90s.

After four chapters where all the basic concepts are reviewed, from the mechanics of program execution inside CPUs, to pipelining and superscalar execution, the author jumps right into the description of one of the most widely know microprocessors from Intel, and a brand which lived for quite a long time: the Pentium.

From there on most of the chapters are dedicated to the description and comparison of the major microarchitectures and microprocessors from Intel, IBM and Motorola. In order:

Especially interesting are the two chapters (7 and 8) dedicated to a detailed comparison of the Pentium 4 and the PowerPC G4e. Those two processors were designed with two completely different strategies, with the Pentium 4 sporting a deep and narrow pipeline, while the G4e a wide and shallow one. Jon goes into great detail on the implications of the two choices and how they impacted other design decisions and the final performance (both in raw speed and power) of the two approaches.

In between the discussion of the G5 and the PentiumM/Core, there are two interesting chapters which introduce the topics of 64bit computing (and how this was addressed by Intel and AMD) and of cache and memory hierarchy.

The chapter about PentiumM and Core/Core2 is in my opinion a bit too short: I hoped there would be more discussion on those 3 microarchitectures, especially in the light of the multi-core versions and how this impacted the architecture of the L2 cache, etc…

Jon has done a pretty good job at describing at a good level of detail some of the most important microarchitectures, always putting them into their historical context and guiding the reader in understanding how the focus of microprocessor designers has shifted from pure raw speed and high clock frequencies, to creating high-peforming low-power architectures.

Reading the book has reminded me of the cover stories I used to find in Byte Magazine which described in great details the new microprocessors as they were introduced in the market. This book helped revive in me an interest in CPU architectures and I hope Jon will consider doing a “sequel”, maybe including some of the CPUs and topis that are missing and that I think are very interesting: Stream Processors (now widely used in GPUs), VLIW processors, IBM Cell, IBM POWER6, HyperThreading and CMP (chip-multiprocessing), Sun Niagara, ARM processors, …

I wish I had such a book during my microelectronics degree courses!

Definitely a good buy.

Written by theglide

January 7, 2007 at 9:19 pm

Posted in Books, CPU